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Assume a large shared LLC that is tiled and distributed on the chip. Assume that the OS page size is 16KB. The entire LLC has a size of 32 MB, uses 64-byte blocks, and is 32-way set-associative. What is the maximum number of tiles such that the OS has full flexibility in placing a page in a tile of its choosing?

Respuesta :

batolisis

Answer:

19 - 22 bits ( maximum number of tiles )

Explanation:

from the given data :

  • There is 60 k sets ( 6 blocks offset bits , 16 index bits and 18 tag bits )
  • Address has 13-bit page offset and 27 page number bits
  • 14-22 bits are used for page number and index bits

therefore any tour of these bits can be used to designate/assign tile number

so the maximum number of tiles such that the OS has full flexibility in placing a page in a tile of its choosing can be between 19 -22 bits

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